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delay lock meaning in Chinese

延迟锁定

Examples

  1. Firstly , the principle and realization of the step acquisition and delay locked loop are discussed
    首先,论文讨论了步进捕获延迟锁定环的原理及实现机理。
  2. The principle of large step fast acquisition and the circuit design of large step fast acquisition delay lock loop ( lsdll ) are disgussed as the emphasis
    本文着重从理论和电路设计两方面对大步进快速捕获方法和大步进快速捕获延迟锁定环进行讨论。
  3. In the second part , some of the multipath mitigation techniques widely used presently are analysed and compared with each other , from which we select the medll ( multipath estimating delay lock loop ) technique as the multipath mitigation algorithm in scope of signal processing in the receivers
    第二部分通过对目前常用的多径消除技术进行分析与比较,选择了medll技术作为接收机信号处理阶段的多径消除算法。
  4. There are two uncertain factor about it : the phase of the pn code and the doppler - shift . after capturing the received signal successfully , the traditional ds receiver always uses a delay locked loop ( dll ) to synchronize the pn code and then uses a costas loop to realize the carrier synchronization . this complex closed - loop structure not only take long time to realize the synchronization , but also has the defect of “ hang up ”
    传统的扩频接收机通常在捕获伪码信号后利用迟早门鉴相的延时锁定环来实现伪码的精同步,解扩后利用科斯塔斯环实现载波同步,这种闭环结构不仅同步时间长、结构复杂,而且锁相环还存在所谓的“ hang - up ”现象。
  5. Chapter one introduces the recent development of usb2 . 0 and the overall architecture of transceiver interface ; chapter two proposes the design flow and design style ; chapter three presents the whole system and module partition ; chapter four emphasizes on the dual - mode transmitter circuit , and gives out the simulation waveforms ; chapter five focuses on the design of over - sampling receiver and dll ( delay locked loop ) module ; chapter six designs the band - gap reference circuit . in the end , it concludes the design , and estimates the trend of usb . the dissertation is emphasized on dual - mode transmitter architecture , implementation of high speed dll using dba ( digital - based analog ) technology and a new design methodology for complex digital modules in mixed - signal circuit
    本文第一章介绍了usb2 . 0的发展现状和收发器接口芯片系统;第二章介绍了该芯片的设计流程和风格;第三章介绍了该接口芯片的总体构架以及模块划分;第四章着重介绍双模发送器电路设计并给出了仿真验证波形;接下来第五章分析了过采样接收器的设计并对其中的dll ( delaylockedloop )模块设计进行了详细的分析;第六章介绍了本芯片内置的基准电压源的设计;最后对本文的设计一个总的回顾和总结,并展望下一代usb的发展方向。
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Related Words

  1. amplitude delay
  2. balance delay
  3. delay helix
  4. delay penalty
  5. eliminating delays
  6. delayed instability
  7. packet delay
  8. processing delay
  9. delay slot
  10. minimum delay
  11. delay line time compressor
  12. delay line,dl
  13. delay lock loop
  14. delay lock loop,dll
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